Scalable production and integration techniques for van der Waals (vdW) layered materials are vital for their implementation in next-generation nanoelectronics. Among available approaches, perhaps the most well-received is atomic layer deposition (ALD) due to its self-limiting layer-by-layer growth mode. However, ALD-grown vdW materials generally require high processing temperatures and/or additional postdeposition annealing steps for crystallization. Also, the collection of ALD-producible vdW materials is rather limited by the lack of a material-specific tailored process design. Here, we report the annealing-free wafer-scale growth of monoelemental vdW tellurium (Te) thin films using a rationally designed ALD process at temperatures as low as 50 °C. They exhibit exceptional homogeneity/crystallinity, precise layer controllability, and 100% step coverage, all of which are enabled by introducing a dual-function co-reactant and adopting a so-called repeating dosing technique. Electronically, vdW-coupled and mixed-dimensional vertical p-n heterojunctions with MoS2 and n-Si, respectively, are demonstrated with well-defined current rectification as well as spatial uniformity. Additionally, we showcase an ALD-Te-based threshold switching selector with fast switching time (∼40 ns), selectivity (∼104), and low Vth (∼1.3 V). This synthetic strategy allows the low-thermal-budget production of vdW semiconducting materials in a scalable fashion, thereby providing a promising approach for monolithic integration into arbitrary 3D device architectures.
A research team, led by Professor Joonki Suh in the Department of Materials Science and Engineering and the Graduate School of Semiconductor Materials and Devices Engineering at UNIST, has made a significant breakthrough in thin film deposition technology. By employing an innovative atomic layer deposition (ALD) process, Professor Seo successfully achieved regular arrangement of tellurium (Te) atoms at low temperatures as low as 50 degrees Celsius.
The ALD method is a cutting-edge thin film process that enables precise stacking of semiconductor materials at the atomic layer level on three-dimensional structures—even at low process temperatures. However, traditional application to next-generation semiconductors requires high processing temperatures above 250 degrees Celsius and additional heat treatment exceeding 450 degrees Celsius.
In this groundbreaking research, the UNIST team applied ALD to monoelemental van der Waals tellurium—a material under extensive investigation for its potential applications in electronic devices and thermoelectric materials. Remarkably, they successfully fabricated high-quality Te thin films without any post-deposition heat treatment at an unprecedentedly low temperature of only 50 degrees Celsius. The resulting films exhibited exceptional uniformity with precisely controlled thickness down to nanometers scale—achieving perfect atom arrangement with one out of every billion atoms.
Figure 1. Scalability, controllability, and homogeneity of atomic layer deposited tellurium (ALD-Te). (Left) ALD-Te: vdW crystal in thin film form, (Right) Electronic-grade ALD-Te.
To enhance reactivity at lower temperatures, the research team employed two precursors with acid-base properties. Additionally, they introduced co-reactants to improve surface reactions and stability while adopting a repeating dosing technique by injecting precursors in shorter intervals. These strategies enabled the production of dense and continuous Te thin films compared to conventional methods that often resulted in porous or discontinuous grain depositions.
The developed manufacturing process allowed for wafer-scale growth on entire 4-inch (100mm) wafers, providing precise atomic layer-level thickness control and uniform deposition. Furthermore, the Te thin films demonstrated compatibility with vertical three-dimensional structures—a crucial requirement for high device integration. This breakthrough holds significant potential for various electronic devices such as transistors, rectifiers, and selection elements.
“This research fulfills all the essential criteria of low-temperature, large-area, and high-quality synthesis in semiconductor deposition processes,” stated Professor Suh.
The results of this groundbreaking research were published online on July 11 in the esteemed international journal ACS Nano. Besides, its remarkable achievements were recognized by being featured as a cover paper. The study was conducted through support from the National Research Foundation of Korea (NRF), the Ministry of Science and ICT (MSIT), the Korea Evaluation Institute of Industrial Technology (KEIT), and the Korea Semiconductor Industry Association (KSIA).
Changhwan Kim, Namwook Hur, Jiho Yang, et al., “Atomic Layer Deposition Route to Scalable, Electronic-Grade van der Waals Te Thin Films,” ACS Nano, (2023).